[PATCH] RISC-V: Provide a more helpful error message on invalid ISA strings

Andrew Jones ajones at ventanamicro.com
Fri Jun 30 01:06:21 PDT 2023


On Fri, Jun 30, 2023 at 12:17:27AM +0100, Conor Dooley wrote:
...
>  old_interface:
> -	if (!IS_ENABLED(CONFIG_RISCV_ISA_FALLBACK) && !riscv_isa_fallback_cmdline)
> +	if (!IS_ENABLED(CONFIG_RISCV_ISA_FALLBACK) && !riscv_isa_fallback_cmdline) {
> +		pr_warn("CPU with hartid=%lu is invalid, this kernel does not parse riscv,isa",

\"riscv,isa\" to match the way it's done below.

> +			*hart);
>  		return -ENODEV;
> +	}
>  
>  	if (of_property_read_string(node, "riscv,isa", &isa)) {
>  		pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",
> 


Thanks,
drew



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