[PATCH v2] riscv: Discard vector state on syscalls
Björn Töpel
bjorn at kernel.org
Mon Jun 26 11:04:13 PDT 2023
Björn Töpel <bjorn at kernel.org> writes:
> Björn Töpel <bjorn at kernel.org> writes:
>
>> From: Björn Töpel <bjorn at rivosinc.com>
>>
>> The RISC-V vector specification states:
>> Executing a system call causes all caller-saved vector registers
>> (v0-v31, vl, vtype) and vstart to become unspecified.
>
> A bit of a corner case, but this will make sigreturn syscalls discard
> the vector state as well.
>
> Is that an issue? E.g. a user cannot build userspace context switching
> application. Does arm64 SVE handle sigreturn in a special way?
NVM; My bad. The vector state is cleared on *entry*, but then the
registers passed on signal stack is restored as usual.
Sorry for the noise! We're all good!
Björn
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