[PATCH v2 3/3] RISC-V: add T-Head vector errata handling
kernel test robot
lkp at intel.com
Thu Jun 22 20:11:17 PDT 2023
Hi Heiko,
kernel test robot noticed the following build errors:
[auto build test ERROR on next-20230622]
[cannot apply to linus/master v6.4-rc7 v6.4-rc6 v6.4-rc5 v6.4-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Heiko-Stuebner/RISC-V-move-vector-available-status-into-a-dedicated-variable/20230623-081314
base: next-20230622
patch link: https://lore.kernel.org/r/20230622231305.631331-4-heiko%40sntech.de
patch subject: [PATCH v2 3/3] RISC-V: add T-Head vector errata handling
config: riscv-randconfig-r042-20230622 (https://download.01.org/0day-ci/archive/20230623/202306231142.j8XLzSQL-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230623/202306231142.j8XLzSQL-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202306231142.j8XLzSQL-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from arch/riscv/include/asm/alternative.h:9,
from arch/riscv/include/asm/errata_list.h:8,
from arch/riscv/include/asm/tlbflush.h:12,
from arch/riscv/include/asm/pgtable.h:112,
from arch/riscv/include/asm/uaccess.h:12,
from include/linux/uaccess.h:11,
from include/linux/sched/task.h:11,
from include/linux/sched/signal.h:9,
from include/linux/rcuwait.h:6,
from include/linux/percpu-rwsem.h:7,
from include/linux/fs.h:33,
from include/linux/compat.h:17,
from arch/riscv/include/asm/elf.h:12,
from include/linux/elf.h:6,
from include/linux/module.h:19,
from include/linux/device/driver.h:21,
from include/linux/device.h:32,
from include/linux/energy_model.h:5,
from kernel/sched/fair.c:23:
arch/riscv/include/asm/vector.h: In function '__riscv_v_vstate_save':
>> arch/riscv/include/asm/vector.h:206:17: error: expected ':' or ')' before 'THEAD_VSETVLI_T4X0E8M8D1'
206 | THEAD_VSETVLI_T4X0E8M8D1
| ^~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:78:9: note: in definition of macro 'ALT_NEW_CONTENT'
78 | new_c "\n" \
| ^~~~~
arch/riscv/include/asm/alternative-macros.h:104:9: note: in expansion of macro '__ALTERNATIVE_CFG'
104 | __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))
| ^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:152:9: note: in expansion of macro '_ALTERNATIVE_CFG'
152 | _ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k)
| ^~~~~~~~~~~~~~~~
arch/riscv/include/asm/vector.h:192:23: note: in expansion of macro 'ALTERNATIVE'
192 | asm volatile (ALTERNATIVE(
| ^~~~~~~~~~~
In file included from arch/riscv/include/asm/switch_to.h:11,
from kernel/sched/fair.c:51:
arch/riscv/include/asm/vector.h:188:23: warning: unused variable 'vl' [-Wunused-variable]
188 | unsigned long vl;
| ^~
arch/riscv/include/asm/vector.h: In function '__riscv_v_vstate_restore':
arch/riscv/include/asm/vector.h:239:17: error: expected ':' or ')' before 'THEAD_VSETVLI_T4X0E8M8D1'
239 | THEAD_VSETVLI_T4X0E8M8D1
| ^~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:78:9: note: in definition of macro 'ALT_NEW_CONTENT'
78 | new_c "\n" \
| ^~~~~
arch/riscv/include/asm/alternative-macros.h:104:9: note: in expansion of macro '__ALTERNATIVE_CFG'
104 | __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))
| ^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:152:9: note: in expansion of macro '_ALTERNATIVE_CFG'
152 | _ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k)
| ^~~~~~~~~~~~~~~~
arch/riscv/include/asm/vector.h:225:23: note: in expansion of macro 'ALTERNATIVE'
225 | asm volatile (ALTERNATIVE(
| ^~~~~~~~~~~
arch/riscv/include/asm/vector.h:222:23: warning: unused variable 'vl' [-Wunused-variable]
222 | unsigned long vl;
| ^~
kernel/sched/fair.c: At top level:
kernel/sched/fair.c:688:5: warning: no previous prototype for 'sched_update_scaling' [-Wmissing-prototypes]
688 | int sched_update_scaling(void)
| ^~~~~~~~~~~~~~~~~~~~
--
In file included from arch/riscv/include/asm/alternative.h:9,
from arch/riscv/include/asm/errata_list.h:8,
from arch/riscv/include/asm/tlbflush.h:12,
from arch/riscv/include/asm/pgtable.h:112,
from arch/riscv/include/asm/uaccess.h:12,
from include/linux/uaccess.h:11,
from include/linux/sched/task.h:11,
from include/linux/sched/signal.h:9,
from include/linux/sched/cputime.h:5,
from kernel/sched/build_utility.c:13:
arch/riscv/include/asm/vector.h: In function '__riscv_v_vstate_save':
>> arch/riscv/include/asm/vector.h:206:17: error: expected ':' or ')' before 'THEAD_VSETVLI_T4X0E8M8D1'
206 | THEAD_VSETVLI_T4X0E8M8D1
| ^~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:78:9: note: in definition of macro 'ALT_NEW_CONTENT'
78 | new_c "\n" \
| ^~~~~
arch/riscv/include/asm/alternative-macros.h:104:9: note: in expansion of macro '__ALTERNATIVE_CFG'
104 | __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))
| ^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:152:9: note: in expansion of macro '_ALTERNATIVE_CFG'
152 | _ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k)
| ^~~~~~~~~~~~~~~~
arch/riscv/include/asm/vector.h:192:23: note: in expansion of macro 'ALTERNATIVE'
192 | asm volatile (ALTERNATIVE(
| ^~~~~~~~~~~
In file included from arch/riscv/include/asm/switch_to.h:11,
from kernel/sched/build_utility.c:51:
arch/riscv/include/asm/vector.h:188:23: warning: unused variable 'vl' [-Wunused-variable]
188 | unsigned long vl;
| ^~
arch/riscv/include/asm/vector.h: In function '__riscv_v_vstate_restore':
arch/riscv/include/asm/vector.h:239:17: error: expected ':' or ')' before 'THEAD_VSETVLI_T4X0E8M8D1'
239 | THEAD_VSETVLI_T4X0E8M8D1
| ^~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:78:9: note: in definition of macro 'ALT_NEW_CONTENT'
78 | new_c "\n" \
| ^~~~~
arch/riscv/include/asm/alternative-macros.h:104:9: note: in expansion of macro '__ALTERNATIVE_CFG'
104 | __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))
| ^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/alternative-macros.h:152:9: note: in expansion of macro '_ALTERNATIVE_CFG'
152 | _ALTERNATIVE_CFG(old_content, new_content, vendor_id, patch_id, CONFIG_k)
| ^~~~~~~~~~~~~~~~
arch/riscv/include/asm/vector.h:225:23: note: in expansion of macro 'ALTERNATIVE'
225 | asm volatile (ALTERNATIVE(
| ^~~~~~~~~~~
arch/riscv/include/asm/vector.h:222:23: warning: unused variable 'vl' [-Wunused-variable]
222 | unsigned long vl;
| ^~
vim +206 arch/riscv/include/asm/vector.h
184
185 static inline void __riscv_v_vstate_save(struct __riscv_v_ext_state *save_to,
186 void *datap)
187 {
188 unsigned long vl;
189
190 riscv_v_enable();
191 __vstate_csr_save(save_to);
192 asm volatile (ALTERNATIVE(
193 "nop\n\t"
194 ".option push\n\t"
195 ".option arch, +v\n\t"
196 "vsetvli %0, x0, e8, m8, ta, ma\n\t"
197 "vse8.v v0, (%1)\n\t"
198 "add %1, %1, %0\n\t"
199 "vse8.v v8, (%1)\n\t"
200 "add %1, %1, %0\n\t"
201 "vse8.v v16, (%1)\n\t"
202 "add %1, %1, %0\n\t"
203 "vse8.v v24, (%1)\n\t"
204 ".option pop\n\t",
205 "mv t0, %1\n\t"
> 206 THEAD_VSETVLI_T4X0E8M8D1
207 THEAD_VSB_V_V0T0
208 "addi t0, t0, 128\n\t"
209 THEAD_VSB_V_V8T0
210 "addi t0, t0, 128\n\t"
211 THEAD_VSB_V_V16T0
212 "addi t0, t0, 128\n\t"
213 THEAD_VSB_V_V24T0, THEAD_VENDOR_ID,
214 ERRATA_THEAD_VECTOR, CONFIG_ERRATA_THEAD_VECTOR)
215 : "=&r" (vl) : "r" (datap) : "t0", "t4", "memory");
216 riscv_v_disable();
217 }
218
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