[PATCH] RISC-V: Clobber V registers on syscalls

[Björn Töpel]

Rémi Denis-Courmont <remi at remlab.net> writes:

> Le keskiviikkona 14. kesäkuuta 2023, 19.35.34 EEST Palmer Dabbelt a écrit :
>> The V registers are clobbered by standard ABI functions, so userspace
>> probably doesn't have anything useful in them by the time we get to the
>> kernel.
>
> Indeed, for your typical system call, wrapped by two or more layers of 
> function calls inside libc, userspace will treat the registers as clobbered 
> anyhow.
>
> But AFAIU, other architectures don't gratuitiously clobber SIMD or vector 
> registers, even those that are callee-clobbered by their respective function 
> calling convention, or do they? FWIW, Arm is going the opposite direction with 
> their higher privilege calls (newer versions of SMCCC define how to preserve 
> SVE vectors).

Actually, it's from the V spec:
    riscv-v-spec-1.0-4.pdf:
      Executing a system call causes all caller-saved vector registers
      (v0-v31, vl, vtype) and vstart to become unspecified.

AFAIU Arm's SVE/SME has that as well.


Björn