[RFC PATCH v4 05/10] dt-bindings: interrupt-controller: Add ACLINT MSWI and SSWI bindings
Vivian Wang
uwu at dram.page
Fri Jun 16 07:39:09 PDT 2023
Hi all,
We are working on devicetree generation for rocket-chip, specifically
generating ACLINT nodes instead of CLINT nodes. (WIP at [1].) We were
wondering if riscv,aclint-{m,s}swi should really be an interrupt-controller.
According to the devicetree specification (v0.3 found at [2]), an
interrupt-controller *receives* interrupts. The ACLINT devices only ever
generates interrupts, so they would be classified as interrupt
generating device rather than interrupt controller or interrupt nexus.
These bindings, as is, require the MSWI and SSWI devices to have the
interrupt-controller property and #interrupt-cells = <0>, which does not
reflect its functionality. It nonsensically implies that another device
may have an interrupt routed through an MSWI/SSWI as interrupt-parent.
Removing these requirements makes more sense.
I'm not sure about what other node name to use though. It seems that
these are more like mailboxes, but also not exactly. In any case a
clarification of the bindings would be appreciated.
Thanks,
dram
[1]: https://github.com/chipsalliance/rocket-chip/pull/3330
[2]: https://www.devicetree.org/specifications/
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