[PATCH v3 6/7] dt-bindings: riscv: explicitly mention assumption of Zicntr & Zihpm support

[Rob Herring]

On Wed, 07 Jun 2023 21:28:30 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> Similar to commit 41ebfc91f785 ("dt-bindings: riscv: explicitly mention
> assumption of Zicsr & Zifencei support"), the Zicntr and Zihpm
> extensions also used to be part of the base ISA but were removed after
> the bindings were merged. Document the assumption of their presence in
> the base ISA.
> 
> Suggested-by: Palmer Dabbelt <palmer at rivosinc.com>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Acked-by: Rob Herring <robh at kernel.org>