[PATCH v1 0/8] PCI: microchip: Fixes and clean-ups

daire.mcnamara at microchip.com daire.mcnamara at microchip.com
Wed Jun 14 08:55:48 PDT 2023


From: Daire McNamara <daire.mcnamara at microchip.com>

This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver

These patches are extracted from the link below to separate them from the outbound and inbound
range handling which is taking considerable time.

These patches are regenerated on v6.4-rc6.

Link: https://lore.kernel.org/linux-riscv/Y8p16kaddL+Ot2Oa@wendy/

Daire McNamara (8):
  PCI: microchip: Correct the DED and SEC interrupt bit offsets
  PCI: microchip: Remove cast warning for devm_add_action_or_reset() arg
  PCI: microchip: enable building this driver as a module
  PCI: microchip: Align register, offset, and mask names with hw docs
  PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
  PCI: microchip: Clean up initialisation of interrupts
  PCI: microchip: Gather MSI information from hardware config registers
  PCI: microchip: Re-partition code between probe() and init()

 drivers/pci/controller/Kconfig               |   2 +-
 drivers/pci/controller/pcie-microchip-host.c | 412 +++++++++++--------
 2 files changed, 246 insertions(+), 168 deletions(-)


base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375
-- 
2.25.1




More information about the linux-riscv mailing list