[PATCH v3 1/7] RISC-V: simplify register width check in ISA string parsing

Sunil V L sunilvl at ventanamicro.com
Mon Jun 12 00:07:53 PDT 2023


On Wed, Jun 07, 2023 at 09:28:25PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> Saving off the `isa` pointer to a temp variable, followed by checking if
> it has been incremented is a bit of an odd pattern. Perhaps it was done
> to avoid a funky looking if statement mixed with the ifdeffery.
> 
> Now that we use IS_ENABLED() here just return from the parser as soon as
> we detect a mismatch between the string and the currently running
> kernel.
> 
> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---

Reviewed-by: Sunil V L <sunilvl at ventanamicro.com>



More information about the linux-riscv mailing list