[PATCH v1 0/2] RISC-V: enable rust

Conor Dooley conor.dooley at microchip.com
Thu Jun 8 00:10:21 PDT 2023


Whoops, actually to Kwang this time...

On Thu, Jun 08, 2023 at 08:01:16AM +0100, Conor Dooley wrote:
> Hey Kwang,
> 
> On 08/06/2023 05:46, 손광훈/Tizen Platform Lab(SR)/삼성전자 wrote:
> > Hi,
> > Recently I'm trying to put a rust patch on the risc-v board.
> > I saw a patch [1] and looked through it roughly.
> > Only if llvm(not gcc) is allowed, it looks good with no major problems.
> > 
> > > I'll revisit this when my thoughts have settled down.
> > 
> > If you let me know the problematic part, may I try the patch?
> > 
> > [1] https://lore.kernel.org/linux-riscv/20230405-itinerary-handgrip-
> > a5ffba368148 at spud/
> 
> Yeah, you can definitely try this or the downstream rust-for-linux
> project - both should work well on RISC-V.
> The problematic part is figuring out what ISA extensions are supported
> by the rust compiler being used (and by bindgen), and deciding what to
> put in -march as a result.
> 
> I think it is unlikely to matter for you, unless you're aggressively
> mixing versions for different parts of your toolchain.
> 
> I do intend revisting this, probably after the min. version for rust
> gets bumped, I've just been really busy with other work the last weeks.
> 
> Cheers,
> Conor.


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