[v1, 1/6] riscv: sched: defer restoring Vector context for user

Conor Dooley conor.dooley at microchip.com
Mon Jul 17 02:46:46 PDT 2023


Hey Andy,
Small bit of minor nitpickery..

On Sat, Jul 15, 2023 at 03:00:27PM +0000, Andy Chiu wrote:
> User's will use its Vector registers only after the kernel really

Looks like the ' here can be removed.

> returns to the userspace. So we can delay restoring Vector registers as
> long as we are still running in kernel mode. So, add a thread flag to
> indicates the need of restoring Vector and do the restore at the last
> arch-specific exit-to-user hook. This save the context restoring cost
> when we switch over multiple processes that run V in kernel mode. For
> example, if the kernel performs context swicth from A->B->C, and returns

"a context switch"

> to C's userspace, then there is no need for restoring B's V-register.

"to restore"

> 
> Besides, this also prevents us from repeatedly restoring V context when
> executing kernel-mode Vector multiple times for the upcoming kenel-mode
> Vector patches.
> 
> Signed-off-by: Andy Chiu <andy.chiu at sifive.com>
> ---

> diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
> index 97e6f65ec176..d83975efe866 100644
> --- a/arch/riscv/include/asm/thread_info.h
> +++ b/arch/riscv/include/asm/thread_info.h
> @@ -101,12 +101,14 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
>  #define TIF_NOTIFY_SIGNAL	9	/* signal notifications exist */
>  #define TIF_UPROBE		10	/* uprobe breakpoint or singlestep */
>  #define TIF_32BIT		11	/* compat-mode 32bit process */
> +#define TIF_RISCV_V_DEFER_RESTORE	12

The rest of these have a comment, should the new addition?

Anyway, no meaningful comments from me here Andy,
Acked-by: Conor Dooley <conor.dooley at microchip.com>

Thanks,
Conor.
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