[PATCH v1 2/2] dt-bindings: riscv: add a capacity-dmips-mhz cpu property

[Rob Herring]

On Wed, 04 Jan 2023 18:05:14 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> Since commit 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.")
> RISC-V has used the generic arch topology code, which provides for
> disparate CPU capacities. We never defined a binding to acquire this
> information from the DT though, so document the one already used by the
> generic arch topology code: "capacity-dmips-mhz".
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Acked-by: Rob Herring <robh at kernel.org>