[PATCH v6 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting

Anup Patel apatel at ventanamicro.com
Wed Jan 4 06:04:49 PST 2023


On Wed, Jan 4, 2023 at 6:32 PM Daniel Lezcano <daniel.lezcano at linaro.org> wrote:
>
>
> Hi Anup,
>
> shall I pick the entire series or just the bindings and the driver changes ?

Yes, that would be great. Palmer has already ACKed this series.

Thanks,
Anup

>
>
> On 03/01/2023 15:10, Anup Patel wrote:
> > This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
> > feature based on RISC-V platform capabilities.
> >
> > These patches can also be found in riscv_timer_dt_imp_v6 branch at:
> > https://github.com/avpatel/linux.git
> >
> > Changes since v5:
> >   - Rebased on Linux-6.2-rc2
> >
> > Changes since v4:
> >   - Update commit text of PATCH1 based on Samuel's comments
> >   - Renamed DT property "riscv,timer-can-wake-cpu" to
> >     "riscv,timer-cannot-wake-cpu" in PATCH2 and PATCH3
> >   - Updated description of DT property "riscv,timer-cannot-wake-cpu"
> >     in PATCH2
> >
> > Changes since v3:
> >   - Rebased on Linux-6.1-rc7
> >   - Replaced PATCH1 with a patch to initialize broadcast timer
> >
> > Changes since v2:
> >   - Include Conor's revert patch as the first patch and rebased other patches
> >   - Update PATCH2 to document bindings for separate RISC-V timer DT node
> >   - Update PATCH3 based on RISC-V timer DT node bindings
> >
> > Changes since v1:
> >   - Rebased on Linux-5.19-rc8
> >   - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"
> >
> > Anup Patel (2):
> >    dt-bindings: timer: Add bindings for the RISC-V timer device
> >    clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
> >
> > Conor Dooley (1):
> >    RISC-V: time: initialize hrtimer based broadcast clock event device
> >
> >   .../bindings/timer/riscv,timer.yaml           | 52 +++++++++++++++++++
> >   arch/riscv/kernel/time.c                      |  3 ++
> >   drivers/clocksource/timer-riscv.c             | 10 ++++
> >   3 files changed, 65 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml
> >
>
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