[PATCH -next v14 03/19] riscv: Add new csr defines related to vector extension

[Conor Dooley]

On Fri, Feb 24, 2023 at 05:01:02PM +0000, Andy Chiu wrote:
> From: Greentime Hu <greentime.hu at sifive.com>
> 
> Follow the riscv vector spec to add new csr numbers.
> 
> [guoren at linux.alibaba.com: first porting for new vector related csr]
> Acked-by: Guo Ren <guoren at kernel.org>
> Co-developed-by: Guo Ren <guoren at linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> Co-developed-by: Vincent Chen <vincent.chen at sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen at sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu at sifive.com>
> Reviewed-by: Palmer Dabbelt <palmer at rivosinc.com>
> Suggested-by: Vineet Gupta <vineetg at rivosinc.com>
> Signed-off-by: Andy Chiu <andy.chiu at sifive.com>
> [andyc: added SR_FS_VS]
> Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
> Reviewed-by: Heiko Stuebner <heiko.stuebner at vrull.eu>
> ---
>  arch/riscv/include/asm/csr.h | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index 0e571f6483d9..add51662b7c3 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -24,16 +24,24 @@
>  #define SR_FS_CLEAN	_AC(0x00004000, UL)
>  #define SR_FS_DIRTY	_AC(0x00006000, UL)
>  
> +#define SR_VS           _AC(0x00000600, UL) /* Vector Status */
> +#define SR_VS_OFF       _AC(0x00000000, UL)
> +#define SR_VS_INITIAL   _AC(0x00000200, UL)
> +#define SR_VS_CLEAN     _AC(0x00000400, UL)
> +#define SR_VS_DIRTY     _AC(0x00000600, UL)

I just noticed that these are space-aligned, while the file uses tabs.
Could you please fix that up when you resubmit?

Thanks,
Conor.

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