[PATCH v2 6/9] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC
Conor Dooley
conor.dooley at microchip.com
Mon Feb 20 02:56:23 PST 2023
On Mon, Feb 20, 2023 at 10:32:57AM +0000, Conor Dooley wrote:
> On Mon, Feb 20, 2023 at 10:06:49AM +0530, Anup Patel wrote:
> > On Thu, Jan 5, 2023 at 3:47 AM Conor Dooley <conor at kernel.org> wrote:
> > > On Tue, Jan 03, 2023 at 07:44:06PM +0530, Anup Patel wrote:
> > > > We add DT bindings document for RISC-V advanced platform level
> > > > interrupt controller (APLIC) defined by the RISC-V advanced
> > > > interrupt architecture (AIA) specification.
> > > >
> > > > Signed-off-by: Anup Patel <apatel at ventanamicro.com>
> > > > ---
> > > > .../interrupt-controller/riscv,aplic.yaml | 159 ++++++++++++++++++
> > > > 1 file changed, 159 insertions(+)
> > > > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
>
> > > I'm sorry Anup, but this child versus delegate thing is still not clear
> > > to me binding wise. See below.
> >
> > There are two different information in-context of APLIC domain:
> >
> > 1) HW child domain numbering: If an APLIC domain has N children
> > then HW will have a fixed child index for each of the N children
> > in the range 0 to N-1. This HW child index is required at the time
> > of setting up interrupt delegation in sourcecfgX registers. The
> > "riscv,children" DT property helps firmware (or bootloader) find
> > the total number of child APLIC domains and corresponding
> > HW child index number.
> >
> > 2) IRQ delegation to child domains: An APLIC domain can delegate
> > any IRQ range(s) to a particular APLIC child domain. The
> > "riscv,delegate" DT property is simply a table where we have
> > one row for each IRQ range which is delegated to some child
> > APLIC domain. This property is more of a system setting fixed
> > by the RISC-V platform vendor.
>
> Thanks for the explanations. It's been a while since my brain swapped
> this stuff out, but I think delegate/child makes sense to me now.
> Just don't ask me to write the dt entry as proof...
Having looked at Dramforever's QEMU dtb dump a bit more and your
responses to her, I think that I have "come to terms" with it now
actually.
I suppose when the next version comes around I'll make sure that I
arrive in the same ballpark that QEMU does, based off the descriptions
etc in the binding.
Thanks!
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