[PATCH 19/24] RISC-V: ACPI: cpufeature: Add ACPI support in riscv_fill_hwcap()

[Sunil V L]

On Thu, Feb 09, 2023 at 09:47:52PM +0000, Conor Dooley wrote:
> On Mon, Jan 30, 2023 at 11:52:20PM +0530, Sunil V L wrote:
> > On ACPI based systems, the information about the hart
> > like ISA, extesions supported are defined in RISC-V Hart
> > Capabilities Table (RHCT). Enable filling up hwcap structure
> > based on the information in RHCT.
> > 
> > Signed-off-by: Sunil V L <sunilvl at ventanamicro.com>
> > ---
> >  arch/riscv/kernel/cpufeature.c | 45 ++++++++++++++++++++++++++++------
> >  1 file changed, 38 insertions(+), 7 deletions(-)
> > 
> > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > index 93e45560af30..c10177c608f8 100644
> > --- a/arch/riscv/kernel/cpufeature.c
> > +++ b/arch/riscv/kernel/cpufeature.c
> > @@ -6,12 +6,14 @@
> >   * Copyright (C) 2017 SiFive
> >   */
> >  
> > +#include <linux/acpi.h>
> >  #include <linux/bitmap.h>
> >  #include <linux/ctype.h>
> >  #include <linux/libfdt.h>
> >  #include <linux/log2.h>
> >  #include <linux/module.h>
> >  #include <linux/of.h>
> > +#include <asm/acpi.h>
> >  #include <asm/alternative.h>
> >  #include <asm/cacheflush.h>
> >  #include <asm/errata_list.h>
> > @@ -21,6 +23,7 @@
> >  #include <asm/processor.h>
> >  #include <asm/smp.h>
> >  #include <asm/switch_to.h>
> > +#include <linux/of_device.h>
> 
> Is there a reason this header is not added with the other linux ones?
> 
No, let me move it.

> >  
> >  #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
> >  
> > @@ -93,7 +96,10 @@ void __init riscv_fill_hwcap(void)
> >  	char print_str[NUM_ALPHA_EXTS + 1];
> >  	int i, j, rc;
> >  	unsigned long isa2hwcap[26] = {0};
> > +	struct acpi_table_header *rhct;
> > +	acpi_status status;
> >  	unsigned long hartid;
> > +	unsigned int cpu;
> >  
> >  	isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I;
> >  	isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M;
> > @@ -106,18 +112,38 @@ void __init riscv_fill_hwcap(void)
> >  
> >  	bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX);
> >  
> > -	for_each_of_cpu_node(node) {
> > +	if (!acpi_disabled) {
> > +
> 
> Extraneous blank line.
> 
Okay

> > +		status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> > +		if (ACPI_FAILURE(status))
> > +			return;
> > +	}
> > +
> > +	for_each_possible_cpu(cpu) {
> >  		unsigned long this_hwcap = 0;
> >  		DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX);
> >  		const char *temp;
> >  
> > -		rc = riscv_of_processor_hartid(node, &hartid);
> > -		if (rc < 0)
> > -			continue;
> > +		if (acpi_disabled) {
> > +			node = of_cpu_device_node_get(cpu);
> > +			if (node) {
> > +				rc = riscv_of_processor_hartid(node, &hartid);
> > +				if (rc < 0)
> > +					continue;
> >  
> > -		if (of_property_read_string(node, "riscv,isa", &isa)) {
> > -			pr_warn("Unable to find \"riscv,isa\" devicetree entry\n");
> > -			continue;
> > +				if (of_property_read_string(node, "riscv,isa", &isa)) {
> > +					pr_warn("Unable to find \"riscv,isa\" devicetree entry\n");
> > +					continue;
> > +				}
> > +				of_node_put(node);
> > +			}
> > +		} else {
> > +			rc = acpi_get_riscv_isa(rhct, get_acpi_id_for_cpu(cpu), &isa);
> > +			if (rc < 0) {
> > +				pr_warn("Unable to get ISA for the hart - %d\n",
> > +						cpu);
> 
> The alignment here is wrong, but the whole thing fits on a single line.
> 
Okay

> > +				continue;
> > +			}
> >  		}
> >  
> >  		temp = isa;
> > @@ -248,6 +274,11 @@ void __init riscv_fill_hwcap(void)
> >  			bitmap_and(riscv_isa, riscv_isa, this_isa, RISCV_ISA_EXT_MAX);
> >  	}
> >  
> > +#ifdef CONFIG_ACPI
> 
> Is this guard actually needed, or is acpi_put_table() always available?
> 
It can be removed.

Thanks,
Sunil

> Cheers,
> Conor.
> 
> > +	if (!acpi_disabled)
> > +		acpi_put_table((struct acpi_table_header *)rhct);
> > +#endif
> > +
> >  	/* We don't support systems with F but without D, so mask those out
> >  	 * here. */
> >  	if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap & COMPAT_HWCAP_ISA_D)) {
> > -- 
> > 2.38.0
> >