[PATCH v1 1/3] dt-bindings: dma: snps,dw-axi-dmac: Update resets and add snps,num-hs-if

[Walker Chen]

Add two reset items and properties 'snps,num-hs-if'.
The DMA controller needs to be reset before being used in JH7110 SoC.
Another difference from the original version is that the hardware
handshake number of DMA can be up to 56 while the number in original
version is less than 16, and different registers are selected according
to this.

Signed-off-by: Walker Chen <walker.chen at starfivetech.com>
---
 .../bindings/dma/snps,dw-axi-dmac.yaml          | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index 67aa7bb6d36a..1a8d8c20e254 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -9,6 +9,7 @@ title: Synopsys DesignWare AXI DMA Controller
 maintainers:
   - Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
   - Jee Heng Sia <jee.heng.sia at intel.com>
+  - Walker Chen <walker.chen at starfivetech.com>
 
 description:
   Synopsys DesignWare AXI DMA Controller DT Binding
@@ -21,6 +22,7 @@ properties:
     enum:
       - snps,axi-dma-1.01a
       - intel,kmb-axi-dma
+      - starfive,axi-dma
 
   reg:
     minItems: 1
@@ -59,7 +61,12 @@ properties:
     maximum: 8
 
   resets:
-    maxItems: 1
+    maxItems: 2
+
+  reset-names:
+    items:
+      - const: axi-rst
+      - const: ahb-rst
 
   snps,dma-masters:
     description: |
@@ -74,6 +81,14 @@ properties:
     $ref: /schemas/types.yaml#/definitions/uint32
     enum: [0, 1, 2, 3, 4, 5, 6]
 
+  snps,num-hs-if:
+    description: |
+      The number of hardware handshake. If it is more than 16,
+      CHx_CFG2 is used to configure the DMA transfer instead of CHx_CFG.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 256
+
   snps,priority:
     description: |
       Channel priority specifier associated with the DMA channels.
-- 
2.17.1