[RFC 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC

[JeeHeng Sia]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> Sent: Tuesday, December 26, 2023 9:33 PM
> To: JeeHeng Sia <jeeheng.sia at starfivetech.com>; kernel at esmil.dk; conor at kernel.org; robh+dt at kernel.org;
> krzysztof.kozlowski+dt at linaro.org; paul.walmsley at sifive.com; palmer at dabbelt.com; aou at eecs.berkeley.edu;
> mturquette at baylibre.com; sboyd at kernel.org; p.zabel at pengutronix.de; emil.renner.berthing at canonical.com; Hal Feng
> <hal.feng at starfivetech.com>; Xingyu Wu <xingyu.wu at starfivetech.com>
> Cc: linux-riscv at lists.infradead.org; devicetree at vger.kernel.org; linux-kernel at vger.kernel.org; linux-clk at vger.kernel.org; Leyfoon Tan
> <leyfoon.tan at starfivetech.com>
> Subject: Re: [RFC 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC
> 
> On 26/12/2023 06:38, Sia Jee Heng wrote:
> >
> > Patch 16 adds clocks and reset nodes to the JH8100 device tree.
> >
> > Changes since [2]:
> 
> Then this is v2, please version your patches correctly, so tools and
> people will understand it.
Noted. Will get it fixed in the next version.
> 
> Best regards,
> Krzysztof