[PATCH V2 4/4] riscv: mm: Optimize TASK_SIZE definition
Leonardo Bras
leobras at redhat.com
Thu Dec 21 21:09:05 PST 2023
On Thu, Dec 21, 2023 at 10:47:01AM -0500, guoren at kernel.org wrote:
> From: Guo Ren <guoren at linux.alibaba.com>
>
> Unify the TASK_SIZE definition with VA_BITS for better readability.
> Add COMPAT mode user address space info in the comment.
>
> Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren at kernel.org>
> ---
> arch/riscv/include/asm/pgtable.h | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index e415582276ec..d165ddae3b42 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -866,6 +866,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
> * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
> * Task size is:
> * - 0x9fc00000 (~2.5GB) for RV32.
> + * - 0x80000000 ( 2GB) for RV64 compat mode
> * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
> * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
> * - 0x100000000000000 ( 64PB) for RV64 using SV57 mmu
> @@ -877,11 +878,11 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
> * Similarly for SV57, bits 63–57 must be equal to bit 56.
> */
> #ifdef CONFIG_64BIT
> -#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)
> +#define TASK_SIZE_64 (UL(1) << (VA_BITS - 1))
Checked for l5, l4 and l3, and it seems a correct replacement.
>
> #ifdef CONFIG_COMPAT
> -#define TASK_SIZE_32 (_AC(0x80000000, UL))
> -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
> +#define TASK_SIZE_32 (UL(1) << (VA_BITS_SV32 - 1))
Oh, much better. Thanks for removing the magic number :)
> +#define TASK_SIZE (is_compat_task() ? \
> TASK_SIZE_32 : TASK_SIZE_64)
> #else
> #define TASK_SIZE TASK_SIZE_64
> --
> 2.40.1
>
That's much more readable IMO now. Thanks!
FWIW:
Reviewed-by: Leonardo Bras <leobras at redhat.com>
More information about the linux-riscv
mailing list