[PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree

JeeHeng Sia jeeheng.sia at starfivetech.com
Wed Dec 13 16:34:53 PST 2023



> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing at canonical.com>
> Sent: Wednesday, December 13, 2023 8:39 PM
> To: Emil Renner Berthing <emil.renner.berthing at canonical.com>; JeeHeng Sia <jeeheng.sia at starfivetech.com>; kernel at esmil.dk;
> robh+dt at kernel.org; krzysztof.kozlowski+dt at linaro.org; krzk at kernel.org; conor+dt at kernel.org; paul.walmsley at sifive.com;
> palmer at dabbelt.com; aou at eecs.berkeley.edu; daniel.lezcano at linaro.org; tglx at linutronix.de; conor at kernel.org;
> anup at brainfault.org; gregkh at linuxfoundation.org; jirislaby at kernel.org; michal.simek at amd.com; Michael Zhu
> <michael.zhu at starfivetech.com>; drew at beagleboard.org
> Cc: devicetree at vger.kernel.org; linux-riscv at lists.infradead.org; linux-kernel at vger.kernel.org; Leyfoon Tan
> <leyfoon.tan at starfivetech.com>
> Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
> 
> Emil Renner Berthing wrote:
> > Sia Jee Heng wrote:
> > > Add initial device tree for the StarFive JH8100 RISC-V SoC.
> > >
> > > Signed-off-by: Sia Jee Heng <jeeheng.sia at starfivetech.com>
> > > Reviewed-by: Ley Foon Tan <leyfoon.tan at starfivetech.com>
> >
> > Looks good to me, thanks.
> >
> > Acked-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
> 
> I just learned that this JH8100 is not actually a real SoC yet but just an FPGA
> implementation, and no indication that that's actually a product that will be
> mass produced. Hence a lot of details may change before it becomes a real
> SoC/product people can buy, so let's not add this device tree yet before
> everything is set in silicon.
> 
> Please consider my Acked-by abeve revoked.
> 
> Sia Jee Heng: With that said I still think it's super awesome that you're
> beginning upstreaming support for your new SoCs early. I wish more SoC vendors
> would follow your example.
Hi Emil, I am not sure what you mean. We verified on FPGA & Emulator, and the logic
is pretty much close to the real silicon. I did mention that in the cover letter as well.
I am new to Linux, so I am wondering if there is a Linux upstream guideline mentioning
that pre-silicon software is not allowed to upstream? Hope there is an updated Linux
upstream guideline that benefit other vendors.
> 
> /Emil


More information about the linux-riscv mailing list