[PATCH v5 09/16] dt-bindings: riscv: Add T-Head PMU extension description

[Conor Dooley]

On Wed, Dec 13, 2023 at 03:02:54PM +0800, Yu Chien Peter Lin wrote:
> Document the ISA string for T-Head performance monitor extension
> which provides counter overflow interrupt mechanism.
> 
> Signed-off-by: Yu Chien Peter Lin <peterlin at andestech.com>
> Reviewed-by: Guo Ren <guoren at kernel.org>
> Reviewed-by: Inochi Amaoto <inochiama at outlook.com>
> ---
> Changes v2 -> v3:
>   - New patch
> Changes v3 -> v4:
>   - No change
> Changes v4 -> v5:
>   - Include Guo's Reviewed-by
>   - Include Inochi's Reviewed-by
>   - Update to C910 documentation with its commit hash
> ---
>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index c91ab0e46648..b5cb8ac7ac80 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -258,5 +258,11 @@ properties:
>              in commit 2e5236 ("Ztso is now ratified.") of the
>              riscv-isa-manual.
>  
> +        - const: xtheadpmu
> +          description:
> +            The T-Head performance monitor extension for counter overflow, as ratified

I'm not sure that "ratified" here is the right word, probably
"documented" is better, but I don't think that is worth a resend.

Acked-by: Conor Dooley <conor.dooley at microchip.com>

Cheers,
Conor.

> +            in commit 4c4981 ("Initial commit") of Xuantie C910 user manual.
> +            https://github.com/T-head-Semi/openc910/tree/main/doc
> +
>  additionalProperties: true
>  ...
> -- 
> 2.34.1
> 
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