[PATCH v1] dt-bindings: riscv: permit numbers in "riscv,isa"
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Fri Dec 8 10:01:13 PST 2023
On 08/12/2023 17:06, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> There are some extensions that contain numbers, such as Zve32f, which
> are enabled by the "max" cpu type in QEMU.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
That regex exceeded my capabilities long time ago, so just formality, FWIW:
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
Best regards,
Krzysztof
More information about the linux-riscv
mailing list