[PATCH v3 0/3] RISC-V, KVM: add 'vlenb' and vector CSRs to get-reg-list
Daniel Henrique Barboza
dbarboza at ventanamicro.com
Tue Dec 5 09:45:06 PST 2023
Hi,
In this version we're exporting all vector regs, not just vector CSRs,
in get-reg-list. All changes were done in patch 3.
No other changes made.
Changes from v2:
- patch 3:
- check num_vector_regs() != 0 before copying vector regs
- export all 32 vector regs in num_vector_regs() and copy_vector_reg_indices()
- initialize 'size' out of the loop in copy_vector_reg_indices()
- v2 link: https://lore.kernel.org/kvm/20231205135041.2208004-1-dbarboza@ventanamicro.com/
Daniel Henrique Barboza (3):
RISC-V: KVM: set 'vlenb' in kvm_riscv_vcpu_alloc_vector_context()
RISC-V: KVM: add 'vlenb' Vector CSR
RISC-V: KVM: add vector CSRs in KVM_GET_REG_LIST
arch/riscv/kvm/vcpu_onereg.c | 55 ++++++++++++++++++++++++++++++++++++
arch/riscv/kvm/vcpu_vector.c | 16 +++++++++++
2 files changed, 71 insertions(+)
--
2.41.0
More information about the linux-riscv
mailing list