[PATCH v3 0/4] riscv: sophgo: add clock support for sg2042

[Chen Wang]

This version has one adt_binding_check error (thanks Rob pointed it 
out), so please ignore this v3, I will fix the bug and send out v4 soon.

On 2023/12/4 20:54, Chen Wang wrote:
> From: Chen Wang <unicorn_wang at outlook.com>
>
> This series adds clock controller support for sophgo sg2042.
>
> Thanks,
> Chen
>
> ---
>
> Changes in v3:
>    The patch series is based on v6.7-rc1. You can simply review or test the
>    patches at the link [3].
>    - DTS: don't use syscon but define sg2042 specific system control node. More
>      background info can read [4].
>    - Updating minor issues in dt-bindings as per input from reviews.
>
> Changes in v2:
>    The patch series is based on v6.7-rc1. You can simply review or test the
>    patches at the link [2].
>    - Squashed the patch adding clock definitions with the patch adding the
>      binding for the clock controller.
>    - Updating dt-binding for syscon, remove oneOf for property compatible;
>      define clock controller as child of syscon.
>    - DTS changes: merge sg2042-clock.dtsi into sg2042.dtsi; move clock-frequency
>      property of osc to board devicethree due to the oscillator is outside the
>      SoC.
>    - Fixed some bugs in driver code during testing, including removing warnings
>      for rv32_defconfig.
>    - Updated MAINTAINERS info.
>
> Changes in v1:
>    The patch series is based on v6.7-rc1. You can simply review or test the
>    patches at the link [1].
>
> Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v1 [1]
> Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v2 [2]
> Link: https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v3 [3]
> Link: https://lore.kernel.org/linux-riscv/MA0P287MB03329AE180378E1A2E034374FE82A@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM/ [4]
>
> ---
>
> Chen Wang (4):
>    dt-bindings: soc: sophgo: Add Sophgo system control module
>    dt-bindings: clock: sophgo: Add SG2042 bindings
>    clk: sophgo: Add SG2042 clock generator driver
>    riscv: dts: add clock generator for Sophgo SG2042 SoC
>
>   .../clock/sophgo/sophgo,sg2042-clkgen.yaml    |   50 +
>   .../soc/sophgo/sophgo,sg2042-sysctrl.yaml     |   35 +
>   MAINTAINERS                                   |    7 +
>   .../boot/dts/sophgo/sg2042-milkv-pioneer.dts  |    4 +
>   arch/riscv/boot/dts/sophgo/sg2042.dtsi        |   79 +
>   drivers/clk/Kconfig                           |    1 +
>   drivers/clk/Makefile                          |    1 +
>   drivers/clk/sophgo/Kconfig                    |    8 +
>   drivers/clk/sophgo/Makefile                   |    2 +
>   drivers/clk/sophgo/clk-sophgo-sg2042.c        | 1371 +++++++++++++++++
>   drivers/clk/sophgo/clk-sophgo-sg2042.h        |  226 +++
>   .../dt-bindings/clock/sophgo,sg2042-clkgen.h  |  169 ++
>   12 files changed, 1953 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml
>   create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml
>   create mode 100644 drivers/clk/sophgo/Kconfig
>   create mode 100644 drivers/clk/sophgo/Makefile
>   create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.c
>   create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.h
>   create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h
>
>
> base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86