[PATCH] riscv: Fix SMP when shadow call stacks are enabled

[Sami Tolvanen]

Hi Samuel,

On Tue, Nov 21, 2023 at 1:20 PM Samuel Holland
<samuel.holland at sifive.com> wrote:
>
> This fixes two bugs in SCS initialization for secondary CPUs. First,
> the SCS was not initialized at all in the spinwait boot path. Second,
> the code for the SBI HSM path attempted to initialize the SCS before
> enabling the MMU. However, that involves dereferencing the thread
> pointer, which requires the MMU to be enabled.
>
> Fix both issues by setting up the SCS in the common secondary entry
> path, after enabling the MMU.

Thanks for the patch! Looks like my qemu setup doesn't hit this issue,
but nevertheless, the fix looks good to me.

Reviewed-by: Sami Tolvanen <samitolvanen at google.com>

Sami