[PATCH v2 2/6] RISC-V: Enable cbo.zero in usermode
Conor Dooley
conor at kernel.org
Thu Aug 31 09:46:35 PDT 2023
On Thu, Aug 31, 2023 at 06:39:30PM +0200, Andrew Jones wrote:
> On Thu, Aug 31, 2023 at 05:24:41PM +0100, Conor Dooley wrote:
> > On Wed, Aug 30, 2023 at 06:49:57PM +0200, Andrew Jones wrote:
> > > @@ -130,6 +131,21 @@ riscv_has_extension_unlikely(const unsigned long ext)
> > > return true;
> > > }
> > >
> > > +static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext)
> > > +{
> > > + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE) && riscv_has_extension_likely(ext))
> > > + return true;
> >
> > It'd have been nice to put the explanation for this into the commit
> > message I think, but w/e. Do it if there's a v3 I guess.
>
> Do you mean the "why gate on the alternative config" explanation? If so, I
> can certainly do that for v3.
Yeah, should maybe have specified, sorry.
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