[PATCH] riscv: provide riscv-specific is_trap_insn()

[Guo Ren]

On Mon, Aug 28, 2023 at 4:56 AM Nam Cao <namcaov at gmail.com> wrote:
>
> uprobes expects is_trap_insn() to return true for any trap instructions,
> not just the one used for installing uprobe. The current default
> implementation only returns true for 16-bit c.ebreak if C extension is
> enabled. This can confuse uprobes if a 32-bit ebreak generates a trap
> exception from userspace: uprobes asks is_trap_insn() who says there is no
> trap, so uprobes assume a probe was there before but has been removed, and
> return to the trap instruction. This cause an infinite loop of entering
> and exiting trap handler.
>
> Instead of using the default implementation, implement this function
> speficially for riscv which checks for both ebreak and c.ebreak.
>
> Fixes: 74784081aac8 ("riscv: Add uprobes supported")
> Signed-off-by: Nam Cao <namcaov at gmail.com>
> ---
>  arch/riscv/kernel/probes/uprobes.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/kernel/probes/uprobes.c b/arch/riscv/kernel/probes/uprobes.c
> index 194f166b2cc4..91f4ce101cd1 100644
> --- a/arch/riscv/kernel/probes/uprobes.c
> +++ b/arch/riscv/kernel/probes/uprobes.c
> @@ -3,6 +3,7 @@
>  #include <linux/highmem.h>
>  #include <linux/ptrace.h>
>  #include <linux/uprobes.h>
> +#include <asm/insn.h>
>
>  #include "decode-insn.h"
>
> @@ -17,6 +18,15 @@ bool is_swbp_insn(uprobe_opcode_t *insn)
>  #endif
>  }
 >
> +bool is_trap_insn(uprobe_opcode_t *insn)
> +{
> +#ifdef CONFIG_RISCV_ISA_C
Can we remove the CONFIG_RISCV_ISA_C? As you said, "uprobes expects
is_trap_insn() to return true for any trap instructions". So userspace
wouldn't be limited by CONFIG_RISCV_ISA_C.

> +       if (riscv_insn_is_c_ebreak(*insn))
> +               return true;
> +#endif
> +       return riscv_insn_is_ebreak(*insn);
> +}
> +
>  unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
>  {
>         return instruction_pointer(regs);
> --
> 2.34.1
>


-- 
Best Regards
 Guo Ren