[PATCH] riscv: dts: allwinner: d1: Add PMU event node

Conor Dooley conor at kernel.org
Sat Aug 26 04:57:26 PDT 2023


On Sat, Aug 26, 2023 at 07:25:43PM +0800, Inochi Amaoto wrote:

> >On Sat, Aug 26, 2023 at 04:38:53PM +0800, Inochi Amaoto wrote:
> >> D1 has several pmu events supported by opensbi.
> >> These events can be used by perf for profiling.
> >>
> >> Signed-off-by: Inochi Amaoto <inochiama at outlook.com>
> >
> >Could you please include a link to some documentation as to where these
> >values came from? I know several people have had some trouble with
> >understanding the pmu DT stuff & having some documentation would make
> >this an in-tree end-to-end example.

> The DT field of riscv,pmu for opensbi can be found on:
> https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md

There's an actual dt-binding for this.

> The value can be found in the R1S0 version of C906 documentation:
> https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf
> 
> The meaning of T-HEAD events can be found in this patch:
> https://lore.kernel.org/linux-perf-users/IA1PR20MB4953DD82D0116EC291C21777BBE2A@IA1PR20MB4953.namprd20.prod.outlook.com
> 
> The patch above also provides documentation for T-HEAD events and a example
> that shows how to use perf with T-HEAD events.

What I meant was can you provide links to this in the commit messages so
that people have a way to find the documentation.

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