[v1, 0/3] riscv: fix ptrace and export VLENB

[Maciej W. Rozycki]

On Wed, 16 Aug 2023, Andy Chiu wrote:

> We add a vlenb field in Vector context and save it with the
> riscv_vstate_save() macro. It should not cause performance regression as
> VLENB is a design-time constant and is frequently used by hardware.
> Also, adding this field into the __sc_riscv_v_state may benifit us on a
> future compatibility issue becuse a hardware may have writable VLENB.
> 
> Adding and saving VLENB have an immediate benifit as it gives ptrace a
> better view of the Vector extension and makes it possible to reconstruct
> Vector register files from the dump without doing an additional csr read.

 I think it is an incorrect view of the situation.

 We need to include VLENB not to let a debugger avoid reading VLENB itself 
in its own context, but to have a complete view of the debuggee's register 
file.  While the ptrace(2) API has not been formally standardised by a 
body such as IEEE or The Open Group, our practice across ports has been to 
provide a complete view of the debuggee via ptrace(2) without a need to 
resort to examine the machine and OS on the debugger's side via other 
means.

 So we're not improving ptrace(2), but rather we're removing a defect.

  Maciej