[PATCH v2 2/2] riscv: dts: starfive - Add hwrng node for JH7110 SoC

[Jia Jie Ho]

Add hardware rng controller node for StarFive JH7110 SoC.

Co-developed-by: Jenny Zhang <jenny.zhang at starfivetech.com>
Signed-off-by: Jenny Zhang <jenny.zhang at starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho at starfivetech.com>
Acked-by: Palmer Dabbelt <palmer at rivosinc.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 76046ca533ce..70d107bdcc10 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -848,6 +848,16 @@ sdma: dma-controller at 16008000 {
 			#dma-cells = <2>;
 		};
 
+		rng: rng at 1600c000 {
+			compatible = "starfive,jh7110-trng";
+			reg = <0x0 0x1600C000 0x0 0x4000>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "ahb";
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			interrupts = <30>;
+		};
+
 		gmac0: ethernet at 16030000 {
 			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
 			reg = <0x0 0x16030000 0x0 0x10000>;
-- 
2.34.1