[PATCH v4 4/4] crypto: starfive - Add hash and HMAC support

[Herbert Xu]

On Mon, Apr 10, 2023 at 04:43:37PM +0800, Jia Jie Ho wrote:
>
> The hardware requires user to set a 'final' bit after data transfer completed.
> This completion is to wait for the interrupt signal from device that the final digest 
> has been populated to the read registers.
> 
> I'll do the finalize_request call directly in the next version.

Instead of the IRQ performing a completion, it could instead schedule
a tasklet and do the callback directly from the tasklet.

Actually, the ordering between the IRQ and DMA callback is a bit
confusing.  Which one is supposed to occur first and how does it
interact with the other event?

Cheers,
-- 
Email: Herbert Xu <herbert at gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt