[RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE

[Heiko Stuebner]

Hi Conor,

Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> As discussed at LPC, the SOC_ symbols are being converted to ARCH_
> for the sake of consistency between "incumbent" vendors and those who
> have a legacy from other archs.
> 
> Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
>  arch/riscv/Kconfig.socs               | 2 +-
>  arch/riscv/boot/dts/starfive/Makefile | 2 +-
>  arch/riscv/configs/defconfig          | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index c4c7add1516f..910697baf097 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -17,7 +17,7 @@ config SOC_SIFIVE
>  	help
>  	  This enables support for SiFive SoC platform hardware.
>  
> -config SOC_STARFIVE
> +config ARCH_STARFIVE

doesn't this create a bisection issue?
I.e. the clk-Makefile in the following patch will still do

	obj-$(CONFIG_SOC_STARFIVE)             += starfive/

at this point, so if a git bisect lands here, you stop building
the clock-driver (and maybe more).

I guess some intermediate solution might be helpful, like
introduce the ARCH_STARFIVE and make SOC_STARFIVE select it.
Then do the conversions and after that drop SOC_STARFIVE?


Heiko


>  	bool "StarFive SoCs"
>  	select PINCTRL
>  	select RESET_CONTROLLER
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 039c143cba33..7b00a48580ca 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -1,2 +1,2 @@
>  # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index dac14b95c73d..971986be875f 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -27,7 +27,7 @@ CONFIG_EXPERT=y
>  CONFIG_PROFILING=y
>  CONFIG_ARCH_MICROCHIP_POLARFIRE=y
>  CONFIG_SOC_SIFIVE=y
> -CONFIG_SOC_STARFIVE=y
> +CONFIG_ARCH_STARFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
>