[PATCH v12 05/17] riscv: Add has_vector/riscv_vsize to save vector features.

[Chris Stillson]

(resending, as I forgot to set it to plain mail)

This is the way the original set of patches worked. I tried to change
them as little as possible for the rebase.

On Wed, Sep 21, 2022 at 9:23 PM Samuel Holland <samuel at sholland.org> wrote:
>
> On 9/21/22 16:43, Chris Stillson wrote:
> > From: Greentime Hu <greentime.hu at sifive.com>
> >
> > This patch is used to detect vector support status of CPU and use
> > riscv_vsize to save the size of all the vector registers. It assumes
> > all harts has the same capabilities in SMP system.
> >
> > [guoren at linux.alibaba.com: add has_vector checking]
> > Co-developed-by: Guo Ren <guoren at linux.alibaba.com>
> > Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> > Co-developed-by: Vincent Chen <vincent.chen at sifive.com>
> > Signed-off-by: Vincent Chen <vincent.chen at sifive.com>
> > Signed-off-by: Greentime Hu <greentime.hu at sifive.com>
> > ---
> >  arch/riscv/include/asm/vector.h | 14 +++++
> >  arch/riscv/kernel/cpufeature.c  | 19 +++++++
> >  arch/riscv/kernel/riscv_ksyms.c |  6 +++
> >  arch/riscv/kernel/vector.S      | 93 +++++++++++++++++++++++++++++++++
>
> This file is not added to the Makefile until patch 8.
>
> >  4 files changed, 132 insertions(+)
> >  create mode 100644 arch/riscv/include/asm/vector.h
> >  create mode 100644 arch/riscv/kernel/vector.S
>