[PATCH 06/17] riscv: Reset vector register

[Chris Stillson]

Reset vector registers at boot-time and disable vector instructions
execution for kernel mode.

Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
Co-developed-by: Vincent Chen <vincent.chen at sifive.com>
Signed-off-by: Vincent Chen <vincent.chen at sifive.com>
Co-developed-by: Han-Kuan Chen <hankuan.chen at sifive.com>
Signed-off-by: Han-Kuan Chen <hankuan.chen at sifive.com>
Co-developed-by: Greentime Hu <greentime.hu at sifive.com>
Signed-off-by: Greentime Hu <greentime.hu at sifive.com>
Reviewed-by: Palmer Dabbelt <palmer at rivosinc.com>
---
 arch/riscv/kernel/entry.S |  6 +++---
 arch/riscv/kernel/head.S  | 35 +++++++++++++++++++++++++++++------
 2 files changed, 32 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index b9eda3fcbd6d..1e9987376591 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -77,10 +77,10 @@ _save_context:
         * Disable user-mode memory access as it should only be set in the
         * actual user copy routines.
         *
-        * Disable the FPU to detect illegal usage of floating point in kernel
-        * space.
+        * Disable the FPU/Vector to detect illegal usage of floating point
+        * or vector in kernel space.
         */
-       li t0, SR_SUM | SR_FS
+       li t0, SR_SUM | SR_FS | SR_VS

        REG_L s0, TASK_TI_USER_SP(tp)
        csrrc s1, CSR_STATUS, t0
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index b865046e4dbb..2c81ca42ec4e 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -140,10 +140,10 @@ secondary_start_sbi:
        .option pop

        /*
-        * Disable FPU to detect illegal usage of
-        * floating point in kernel space
+        * Disable FPU & VECTOR to detect illegal usage of
+        * floating point or vector in kernel space
         */
-       li t0, SR_FS
+       li t0, SR_FS | SR_VS
        csrc CSR_STATUS, t0

        /* Set trap vector to spin forever to help debug */
@@ -234,10 +234,10 @@ pmp_done:
 .option pop

        /*
-        * Disable FPU to detect illegal usage of
-        * floating point in kernel space
+        * Disable FPU & VECTOR to detect illegal usage of
+        * floating point or vector in kernel space
         */
-       li t0, SR_FS
+       li t0, SR_FS | SR_VS
        csrc CSR_STATUS, t0

 #ifdef CONFIG_RISCV_BOOT_SPINWAIT
@@ -431,6 +431,29 @@ ENTRY(reset_regs)
        csrw    fcsr, 0
        /* note that the caller must clear SR_FS */
 #endif /* CONFIG_FPU */
+
+#ifdef CONFIG_VECTOR
+       csrr    t0, CSR_MISA
+       li      t1, COMPAT_HWCAP_ISA_V
+       and     t0, t0, t1
+       beqz    t0, .Lreset_regs_done
+
+       /*
+        * Clear vector registers and reset vcsr
+        * VLMAX has a defined value, VLEN is a constant,
+        * and this form of vsetvli is defined to set vl to VLMAX.
+        */
+       li      t1, SR_VS
+       csrs    CSR_STATUS, t1
+       csrs    CSR_VCSR, x0
+       vsetvli t1, x0, e8, m8, ta, ma
+       vmv.v.i v0, 0
+       vmv.v.i v8, 0
+       vmv.v.i v16, 0
+       vmv.v.i v24, 0
+       /* note that the caller must clear SR_VS */
+#endif /* CONFIG_VECTOR */
+
 .Lreset_regs_done:
        ret
 END(reset_regs)
--
2.25.1