[PATCH V5 08/11] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
Guo Ren
guoren at kernel.org
Wed Sep 21 02:53:39 PDT 2022
On Wed, Sep 21, 2022 at 4:34 PM Chen Zhongjin <chenzhongjin at huawei.com> wrote:
>
> Hi,
>
> On 2022/9/18 23:52, guoren at kernel.org wrote:
> > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> > index 5f49517cd3a2..426529b84db0 100644
> > --- a/arch/riscv/kernel/entry.S
> > +++ b/arch/riscv/kernel/entry.S
> > @@ -332,6 +332,33 @@ ENTRY(ret_from_kernel_thread)
> > tail syscall_exit_to_user_mode
> > ENDPROC(ret_from_kernel_thread)
> >
> > +#ifdef CONFIG_IRQ_STACKS
> > +ENTRY(call_on_stack)
> > + /* Create a frame record to save our ra and fp */
> > + addi sp, sp, -RISCV_SZPTR
> > + REG_S ra, (sp)
> > + addi sp, sp, -RISCV_SZPTR
> > + REG_S fp, (sp)
> > +
> > + /* Save sp in fp */
> > + move fp, sp
> > +
> > + /* Move to the new stack and call the function there */
> > + li a3, IRQ_STACK_SIZE
> > + add sp, a1, a3
> > + jalr a2
> > +
> > + /*
> > + * Restore sp from prev fp, and fp, ra from the frame
> > + */
> > + move sp, fp
> > + REG_L fp, (sp)
> > + addi sp, sp, RISCV_SZPTR
> > + REG_L ra, (sp)
> > + addi sp, sp, RISCV_SZPTR
> > + ret
> > +ENDPROC(call_on_stack)
> > +#endif
>
> Seems my compiler (riscv64-linux-gnu-gcc 8.4.0, cross compiling from
> x86) cannot recognize the register `fp`.
The whole entry.S uses s0 instead of fp, so I approve of your advice. Thx.
>
> After I changed it to `s0` this can pass compiling.
>
>
> Seems there is nowhere else using `fp`, can this just using `s0` instead?
>
> Best,
>
> Chen
>
--
Best Regards
Guo Ren
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