[PATCH RFC v2 riscv/for-next 5/5] riscv: align arch_static_branch function

[Guo Ren]

On Sun, Sep 18, 2022 at 8:12 AM Jessica Clarke <jrtc27 at jrtc27.com> wrote:
>
> On 17 Sept 2022, at 19:38, guoren at kernel.org wrote:
> >
> > From: Guo Ren <guoren at linux.alibaba.com>
> >
> > Reduce size of static branch.
> >
> > Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> > Signed-off-by: Guo Ren <guoren at kernel.org>
> > ---
> > arch/riscv/include/asm/jump_label.h | 17 ++++++++++-----
> > arch/riscv/kernel/jump_label.c      | 32 +++++++++++++++++++++++++++++
> > 2 files changed, 44 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/jump_label.h b/arch/riscv/include/asm/jump_label.h
> > index 38af2ec7b9bf..78f747dfa8a2 100644
> > --- a/arch/riscv/include/asm/jump_label.h
> > +++ b/arch/riscv/include/asm/jump_label.h
> > @@ -12,17 +12,21 @@
> > #include <linux/types.h>
> > #include <asm/asm.h>
> >
> > +#ifdef CONFIG_RISCV_ISA_C
> > +#define JUMP_LABEL_NOP_SIZE 2
> > +#else
> > #define JUMP_LABEL_NOP_SIZE 4
> > +#endif
> >
> > static __always_inline bool arch_static_branch(struct static_key *key,
> >                                              bool branch)
> > {
> >       asm_volatile_goto(
> > -             "       .option push                            \n\t"
> > -             "       .option norelax                         \n\t"
> > -             "       .option norvc                           \n\t"
> > +#ifdef CONFIG_RISCV_ISA_C
> > +             "1:     c.nop                                   \n\t"
> > +#else
> >               "1:     nop                                     \n\t"
> > -             "       .option pop                             \n\t"
> > +#endif
> >               "       .pushsection    __jump_table, \"aw\"    \n\t"
> >               "       .align          " RISCV_LGPTR "         \n\t"
> >               "       .long           1b - ., %l[label] - .   \n\t"
> > @@ -39,11 +43,14 @@ static __always_inline bool arch_static_branch_jump(struct static_key *key,
> >                                                   bool branch)
> > {
> >       asm_volatile_goto(
> > +#ifdef CONFIG_RISCV_ISA_C
> > +             "1:     c.j             %l[label]               \n\t"
> > +#else
> >               "       .option push                            \n\t"
> >               "       .option norelax                         \n\t"
> > -             "       .option norvc                           \n\t"
> >               "1:     jal             zero, %l[label]         \n\t"
> >               "       .option pop                             \n\t"
> > +#endif
> >               "       .pushsection    __jump_table, \"aw\"    \n\t"
> >               "       .align          " RISCV_LGPTR "         \n\t"
> >               "       .long           1b - ., %l[label] - .   \n\t"
> > diff --git a/arch/riscv/kernel/jump_label.c b/arch/riscv/kernel/jump_label.c
> > index e6694759dbd0..64a4e5df093d 100644
> > --- a/arch/riscv/kernel/jump_label.c
> > +++ b/arch/riscv/kernel/jump_label.c
> > @@ -11,21 +11,52 @@
> > #include <asm/bug.h>
> > #include <asm/patch.h>
> >
> > +#ifdef CONFIG_RISCV_ISA_C
> > +#define RISCV_INSN_C_NOP 0x0001U
> > +#define RISCV_INSN_C_JAL 0xa001U
>
> This is C.J (i.e. JAL X0) not C.JAL (i.e. JAL RA, which is RV32-only
> and not what you want since it clobbers RA).

Sorry for the macro naming bug. I know I'm using c.j.


101 imm[11|4|9:8|10|6|7|3:1|5] 01 C.J

001 imm[11|4|9:8|10|6|7|3:1|5] 01 C.JAL (RV32)

Here is the correction:
-#define RISCV_INSN_C_JAL 0xa001U
+#define RISCV_INSN_C_J   0xa001U



>
> Jess
>
> > +#else
> > #define RISCV_INSN_NOP 0x00000013U
> > #define RISCV_INSN_JAL 0x0000006fU
> > +#endif
> >
> > void arch_jump_label_transform(struct jump_entry *entry,
> >                              enum jump_label_type type)
> > {
> >       void *addr = (void *)jump_entry_code(entry);
> > +#ifdef CONFIG_RISCV_ISA_C
> > +     u16 insn;
> > +#else
> >       u32 insn;
> > +#endif
> >
> >       if (type == JUMP_LABEL_JMP) {
> >               long offset = jump_entry_target(entry) - jump_entry_code(entry);
> > +#ifdef CONFIG_RISCV_ISA_C
> > +             if (WARN_ON(offset & 1 || offset < -2048 || offset >= 2048))
> > +                     return;
> >
> > +             /*
> > +              * 001 | imm[11|4|9:8|10|6|7|3:1|5] 01 - C.JAL
> > +              */
> > +             insn = RISCV_INSN_C_JAL |
> > +                     (((u16)offset & GENMASK(5, 5)) >> (5 - 2)) |
> > +                     (((u16)offset & GENMASK(3, 1)) << (3 - 1)) |
> > +                     (((u16)offset & GENMASK(7, 7)) >> (7 - 6)) |
> > +                     (((u16)offset & GENMASK(6, 6)) << (7 - 6)) |
> > +                     (((u16)offset & GENMASK(10, 10)) >> (10 - 8)) |
> > +                     (((u16)offset & GENMASK(9, 8)) << (9 - 8)) |
> > +                     (((u16)offset & GENMASK(4, 4)) << (11 - 4)) |
> > +                     (((u16)offset & GENMASK(11, 11)) << (12 - 11));
> > +     } else {
> > +             insn = RISCV_INSN_C_NOP;
> > +     }
> > +#else
> >               if (WARN_ON(offset & 1 || offset < -524288 || offset >= 524288))
> >                       return;
> >
> > +             /*
> > +              * imm[20|10:1|11|19:12] | rd | 1101111 - JAL
> > +              */
> >               insn = RISCV_INSN_JAL |
> >                       (((u32)offset & GENMASK(19, 12)) << (12 - 12)) |
> >                       (((u32)offset & GENMASK(11, 11)) << (20 - 11)) |
> > @@ -34,6 +65,7 @@ void arch_jump_label_transform(struct jump_entry *entry,
> >       } else {
> >               insn = RISCV_INSN_NOP;
> >       }
> > +#endif
> >
> >       mutex_lock(&text_mutex);
> >       patch_text_nosync(addr, &insn, sizeof(insn));
> > --
> > 2.36.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>


-- 
Best Regards
 Guo Ren