[PATCH RFC v2 riscv/for-next 1/5] riscv: align ftrace to 4 Byte boundary and increase ftrace prologue size

[Andy Chiu]

On Thu, Sep 15, 2022 at 2:54 PM Guo Ren <guoren at kernel.org> wrote:
>
> On Tue, Sep 13, 2022 at 5:44 PM Andy Chiu <andy.chiu at sifive.com> wrote:
> >
> > However, we found the -falign-functions alone was not strong enoungh to
> > make all functions align as required. In fact, cold functions are not
> > aligned after turning on optimizations. We consider this is a bug in GCC
> > and turn off guess-branch-probility as a workaround to align all
> > functions.
> Disable pgo static optimization would reduce the code performance. I
> think we need to fix that problem in GCC, and pgo is a default-enabled
> optimization.
I would like to see this fix in GCC as well. Or the other way is to
reserve extra bytes (like, 2 bytes) and pick an aligned address in
software.
> >
> > GCC bug id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88345
> >
> > Signed-off-by: Andy Chiu <andy.chiu at sifive.com>
> > Reviewed-by: Greentime Hu <greentime.hu at sifive.com>
> > ---
> >  arch/riscv/Makefile | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> > index 3fa8ef336822..fd8069f59a59 100644
> > --- a/arch/riscv/Makefile
> > +++ b/arch/riscv/Makefile
> > @@ -11,7 +11,7 @@ LDFLAGS_vmlinux :=
> >  ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
> >         LDFLAGS_vmlinux := --no-relax
> >         KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
> > -       CC_FLAGS_FTRACE := -fpatchable-function-entry=8
> > +       CC_FLAGS_FTRACE := -fpatchable-function-entry=12  -falign-functions=4 -fno-guess-branch-probability
> Another fixup should be covered, eg:
>
> +ifeq ($(CONFIG_RISCV_ISA_C),y)
> +       CC_FLAGS_FTRACE := -fpatchable-function-entry=12
> +else
> +       CC_FLAGS_FTRACE := -fpatchable-function-entry=6
> +endif
>
Thanks for reminding. Yes, we have to do that.

Regards,
Andy