[PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block

[Conor.Dooley at microchip.com]

On 14/09/2022 15:36, Heiko Stuebner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> riscv_cbom_block_size is used by all current non-coherent dma operations,
> not only the zicbom variant. So move it over the block also containing
> the riscv_noncoherent_supported() prototype.
> 
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp at intel.com>
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>

I accidentally fetched palmers repo rather than riscv & noticed he
pushed a fix there for this too:
https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?h=zicbom-fix

I think Palmer's solution is slightly nicer, but to me either makes
little difference, just getting things squared away for 6.0 is all
I care about at this point.

Either this or the one on Palmer's branch is:
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>

> ---
>  arch/riscv/include/asm/cacheflush.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> index a89c005b4bbf..5c16d901d3da 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
>  #endif /* CONFIG_SMP */
> 
>  #ifdef CONFIG_RISCV_ISA_ZICBOM
> -extern unsigned int riscv_cbom_block_size;
>  void riscv_init_cbom_blocksize(void);
>  #else
>  static inline void riscv_init_cbom_blocksize(void) { }
>  #endif
> 
>  #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> +extern unsigned int riscv_cbom_block_size;
>  void riscv_noncoherent_supported(void);
>  #endif
> 
> --
> 2.35.1
>