[PATCH] riscv/kprobe: Optimize the performance of patching instruction slot

Liao Chang liaochang1 at huawei.com
Tue Sep 6 19:33:27 PDT 2022


Since no race condition occurs on each instruction slot, hence it is
safe to patch instruction slot without stopping machine.

Signed-off-by: Liao Chang <liaochang1 at huawei.com>
---
 arch/riscv/kernel/probes/kprobes.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
index e6e950b7cf32..eff7d7fab535 100644
--- a/arch/riscv/kernel/probes/kprobes.c
+++ b/arch/riscv/kernel/probes/kprobes.c
@@ -24,12 +24,14 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
 static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
 {
 	unsigned long offset = GET_INSN_LENGTH(p->opcode);
+	const kprobe_opcode_t brk_insn = __BUG_INSN_32;
+	kprobe_opcode_t slot[MAX_INSN_SIZE];
 
 	p->ainsn.api.restore = (unsigned long)p->addr + offset;
 
-	patch_text(p->ainsn.api.insn, p->opcode);
-	patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset),
-		   __BUG_INSN_32);
+	memcpy(slot, &p->opcode, offset);
+	memcpy((void *)((unsigned long)slot + offset), &brk_insn, 4);
+	patch_text_nosync(p->ainsn.api.insn, slot, offset + 4);
 }
 
 static void __kprobes arch_prepare_simulate(struct kprobe *p)
-- 
2.17.1




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