rdcycle from userland with RISCV_PMU_SBI=y

[Aurelien Jarno]

On 2022-09-02 17:34, Anup Patel wrote:
> On Fri, Sep 2, 2022 at 3:52 PM Jan Wassenberg <janwas at google.com> wrote:
> >
> > OK, but even if frequency changes, a cycle counter seems more useful for benchmarking than a low-resolution wall time.
> >
> > FYI it's not just Highway, the Google benchmark library also uses rdcycle.
> 
> Since the RISC-V ecosystem is still evolving, it is best time to fix
> things now rather
> than later.

Fair enough.

> Currently, only "time" CSR is available to user-space and all other performance
> counters should be enabled (or accessed) using Linux perf syscalls.

This is more complex in practice. For a recent kernel, the availability
of the "cycle" CSR depends on the PMU driver being used or compiled in
the kernel. For instance on both QEMU and a Polarfire Icicle board, the
legacy PMU is getting used, so rdcycle is available:

[   34.420435] Legacy PMU implementation is available

In the meantime, I upgraded QEMU and with it OpenSBI, so the SBI PMU is
used instead, and I should also update it on the Polarfire board, but it
is not so easy. Not that for QEMU, the value of scounteren is ignored,
so that rdcycle is still available.

We should make that consistent so that all users see the same behavior.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien at aurel32.net                 http://www.aurel32.net