[PATCH 3/4] riscv: use BIT macros in t-head errata init

[Conor.Dooley at microchip.com]

On 01/09/2022 23:27, Heiko Stuebner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Using the appropriate BIT macro makes the code better readable.

As you might imagine, I agree!
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>

> 
> Suggested-by: Conor Dooley <conor.dooley at microchip.com>
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> ---
>   arch/riscv/errata/thead/errata.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> index bffa711aaf64..a6f4bd8ccf3f 100644
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -49,10 +49,10 @@ static u32 thead_errata_probe(unsigned int stage,
>          u32 cpu_req_errata = 0;
> 
>          if (errata_probe_pbmt(stage, archid, impid))
> -               cpu_req_errata |= (1U << ERRATA_THEAD_PBMT);
> +               cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
> 
>          if (errata_probe_cmo(stage, archid, impid))
> -               cpu_req_errata |= (1U << ERRATA_THEAD_CMO);
> +               cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
> 
>          return cpu_req_errata;
>   }
> --
> 2.35.1
>