[PATCH v5 7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC
Prabhakar
prabhakar.csengg at gmail.com
Fri Oct 28 09:59:21 PDT 2022
From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
Enable Renesas RZ/Five SoC config in defconfig. It allows the default
upstream kernel to boot on RZ/Five SMARC EVK board.
Alongside enable SERIAL_SH_SCI config so that the serial driver used by
RZ/Five SoC is built-in.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
---
v4 -> v5
* No change
v3 -> v4
* Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
tags with this change)
* Used riscv instead of RISC-V in subject line
v2 -> v3
* Included RB tags
* Updated commit description
v1 -> v2
* New patch
---
arch/riscv/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 05fd5fcf24f9..97fba7884d7a 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_STARFIVE=y
CONFIG_SOC_VIRT=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_R9A07G043=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_PM=y
@@ -123,6 +125,7 @@ CONFIG_INPUT_MOUSEDEV=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_SH_SCI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
--
2.25.1
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