[PATCH v2 4/4] riscv: entry: consolidate general regs saving into save_gp

[Jisheng Zhang]

On Wed, Oct 19, 2022 at 10:55:09AM +0800, Guo Ren wrote:
> On Fri, Sep 30, 2022 at 12:11 AM Jisheng Zhang <jszhang at kernel.org> wrote:
> >
> > On Thu, Sep 29, 2022 at 11:59:00AM +0800, Guo Ren wrote:
> > > On Thu, Sep 29, 2022 at 12:29 AM Jisheng Zhang <jszhang at kernel.org> wrote:
> > > >
> > > > Consolidate the saving/restoring GPs(except ra, sp and tp) into
> > > > save_gp/restore_gp macro.
> > > >
> > > > No functional change intended.
> > > >
> > > > Signed-off-by: Jisheng Zhang <jszhang at kernel.org>
> > > > ---
> > > >  arch/riscv/include/asm/asm.h   | 65 +++++++++++++++++++++++++
> > > >  arch/riscv/kernel/entry.S      | 87 ++--------------------------------
> > > >  arch/riscv/kernel/mcount-dyn.S | 58 +----------------------
> > > >  3 files changed, 70 insertions(+), 140 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
> > > > index 1b471ff73178..2f3b49536e9d 100644
> > > > --- a/arch/riscv/include/asm/asm.h
> > > > +++ b/arch/riscv/include/asm/asm.h
> > > > @@ -68,6 +68,7 @@
> > > >  #endif
> > > >
> > > >  #ifdef __ASSEMBLY__
> > > > +#include <asm/asm-offsets.h>
> > > >
> > > >  /* Common assembly source macros */
> > > >
> > > > @@ -80,6 +81,70 @@
> > > >         .endr
> > > >  .endm
> > > >
> > > > +       /* save all GPs except ra, sp and tp */
> > > > +       .macro save_gp
> > > How about leave x3(gp) out of the macro, and define:
> > > .marco save_from_x5_to_x31
> > > .marco restore_from_x5_to_x31
> >
> > Good idea, will do in next version.
> 
> Where is the next version?
> 
> I want to involve the patch in my generic entry series, it would help
> in the coding convention of the entry code.

Hi,

Here is the v3:
https://lore.kernel.org/linux-riscv/20221003102921.3973-1-jszhang@kernel.org/T/#t

thanks very much