[PATCH v6 0/3] RISC-V: Create unique identification for SoC PMU

[Arnaldo Carvalho de Melo]

Em Mon, Oct 17, 2022 at 09:19:48AM +0300, Nikita Shubin escreveu:
> On Mon, 03 Oct 2022 19:54:40 -0700 (PDT)
> Palmer Dabbelt <palmer at dabbelt.com> wrote:
> > On Mon, 15 Aug 2022 06:22:37 PDT (-0700), nikita.shubin at maquefel.me wrote:
> > > From: Nikita Shubin <n.shubin at yadro.com>

> > > This series aims to provide matching vendor SoC with corresponded
> > > JSON bindings.
> > Acked-by: Palmer Dabbelt <palmer at rivosinc.com>
 
> > not sure if you're looking for this via the RISC-V tree, it looks
> > like usually these get merged via a perf tree?  That's OK with me,
> > but I'm also OK taking them through the RISC-V tree.  Note that
> > cpuinfo dependency seems to be triggering kasan failures, so we'll at
> > least need to sort that out.

> As i remember correctly you were willing to take these patches into 6.0
> =).

> Well they are acked by Palmer and [2] series, which my series depends
> on, also have been accepted.

> I can resend if it helps you.

I picked it from this Message-ID with b4, applied cleanly, but yesterday
the merge window closed for v6.1, I applied it to my perf/core branch,
for v6.2.

Thanks,

- Arnaldo