[RFC PATCH 0/2] RZ/G2UL separate out SoC specific parts

[Lad, Prabhakar]

Hi Rob, Krzysztof,

On Thu, Sep 29, 2022 at 6:24 PM Prabhakar <prabhakar.csengg at gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
>
> Hi All,
>
> This patch series aims to split up the RZ/G2UL SoC DTSI into common parts
> so that this can be shared with the RZ/Five SoC.
>
> Implementation is based on the discussion [0] where I have used option#2.
>
> The Renesas RZ/G2UL (ARM64) and RZ/Five (RISC-V) have almost the same
> identical blocks to avoid duplication a base SoC dtsi (r9a07g043.dtsi) is
> created which will be used by the RZ/G2UL (r9a07g043u.dtsi) and RZ/Five
> (r9a07g043F.dtsi)
>
> Sending this as an RFC to get some feedback.
>
> r9a07g043f.dtsi will look something like below:
>
> #include <dt-bindings/interrupt-controller/irq.h>
>
> #define SOC_PERIPHERAL_IRQ_NUMBER(nr)   (nr + 32)
> #define SOC_PERIPHERAL_IRQ(nr, na)      SOC_PERIPHERAL_IRQ_NUMBER(nr) na
>
> #include <arm64/renesas/r9a07g043.dtsi>
>
> / {
>    ...
>    ...
> };
>
> Although patch#2 can be merged into patch#1 just wanted to keep them separated
> for easier review.
>
> [0] https://lore.kernel.org/linux-arm-kernel/Yyt8s5+pyoysVNeC@spud/T/
>
> Cheers,
> Prabhakar
>
> Lad Prabhakar (2):
>   arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro
>     to specify interrupt property

Can either of you please review patch #1.

Cheers,
Prabhakar

>   arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
>
>  arch/arm64/boot/dts/renesas/r9a07g043.dtsi    | 362 +++++++-----------
>  arch/arm64/boot/dts/renesas/r9a07g043u.dtsi   |  87 +++++
>  .../boot/dts/renesas/r9a07g043u11-smarc.dts   |   2 +-
>  3 files changed, 235 insertions(+), 216 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
>
> --
> 2.25.1
>