[PATCH v5 4/4] mm: support Svnapot in huge vmap
Conor Dooley
conor at kernel.org
Tue Oct 4 11:46:21 PDT 2022
On Mon, Oct 03, 2022 at 09:47:21PM +0800, panqinglin2020 at iscas.ac.cn wrote:
> From: Qinglin Pan <panqinglin2020 at iscas.ac.cn>
>
> The HAVE_ARCH_HUGE_VMAP option can be used to help implement arch
> special huge vmap size. This commit selects this option by default and
> re-writes the arch_vmap_pte_range_map_size for Svnapot 64KB size.
>
> It can be tested when booting kernel in qemu with pci device, which
> will make the kernel to call pci driver using ioremap, and the
> re-written function will be called.
>
> Signed-off-by: Qinglin Pan <panqinglin2020 at iscas.ac.cn>
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 3d5ec1391046..571f77b16ee8 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -70,6 +70,7 @@ config RISCV
> select GENERIC_TIME_VSYSCALL if MMU && 64BIT
> select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
> select HAVE_ARCH_AUDITSYSCALL
> + select HAVE_ARCH_HUGE_VMAP
Maybe you should take a look at the following patchset and see how your
code interacts with it:
https://lore.kernel.org/linux-riscv/20220915065027.3501044-1-liushixin2@huawei.com/
Possible you may have some feedback for Liu Shixin or get some ideas :)
Thanks,
Conor.
> select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
> select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
> select HAVE_ARCH_KASAN if MMU && 64BIT
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index c3fc3c661699..1740d859331a 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -748,6 +748,43 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
> }
> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
>
> +static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
> +{
> + return 0;
> +}
> +
> +static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
> +{
> + return 0;
> +}
> +
> +static inline void p4d_clear_huge(p4d_t *p4d) { }
> +
> +static inline int pud_clear_huge(pud_t *pud)
> +{
> + return 0;
> +}
> +
> +static inline int pmd_clear_huge(pmd_t *pmd)
> +{
> + return 0;
> +}
> +
> +static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
> +{
> + return 0;
> +}
> +
> +static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
> +{
> + return 0;
> +}
> +
> +static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
> +{
> + return 0;
> +}
> +
> /*
> * Encode and decode a swap entry
> *
> diff --git a/arch/riscv/include/asm/vmalloc.h b/arch/riscv/include/asm/vmalloc.h
> index ff9abc00d139..ecd1f784299b 100644
> --- a/arch/riscv/include/asm/vmalloc.h
> +++ b/arch/riscv/include/asm/vmalloc.h
> @@ -1,4 +1,32 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> #ifndef _ASM_RISCV_VMALLOC_H
> #define _ASM_RISCV_VMALLOC_H
>
> +#include <linux/pgtable.h>
> +
> +#ifdef CONFIG_RISCV_ISA_SVNAPOT
> +#define arch_vmap_pte_range_map_size vmap_pte_range_map_size
> +static inline unsigned long
> +vmap_pte_range_map_size(unsigned long addr, unsigned long end, u64 pfn,
> + unsigned int max_page_shift)
> +{
> + if (!has_svnapot())
> + return PAGE_SIZE;
> +
> + if (addr & NAPOT_CONT64KB_MASK)
> + return PAGE_SIZE;
> +
> + if (pfn & (NAPOT_64KB_PTE_NUM - 1UL))
> + return PAGE_SIZE;
> +
> + if ((end - addr) < NAPOT_CONT64KB_SIZE)
> + return PAGE_SIZE;
> +
> + if (max_page_shift < NAPOT_CONT64KB_SHIFT)
> + return PAGE_SIZE;
> +
> + return NAPOT_CONT64KB_SIZE;
> +}
> +#endif /*CONFIG_RISCV_ISA_SVNAPOT*/
> +
> #endif /* _ASM_RISCV_VMALLOC_H */
> --
> 2.35.1
>
>
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