[PATCH v3 04/15] spi: dt-bindings: dw-apb-ssi: update spi-{r,t}x-bus-width
Serge Semin
fancer.lancer at gmail.com
Thu Jun 30 14:43:36 PDT 2022
On Wed, Jun 29, 2022 at 07:43:33PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> Most users of dw-apb-ssi use spi-{r,t}x-bus-width of 1, however the
> Canaan k210 is wired up for a width of 4.
> Quoting Serge:
> The modern DW APB SSI controllers of v.4.* and newer also support the
> enhanced SPI Modes too (Dual, Quad and Octal). Since the IP-core
> version is auto-detected at run-time there is no way to create a
> DT-schema correctly constraining the Rx/Tx SPI bus widths.
> /endquote
>
> As such, drop the restriction on only supporting a bus width of 1.
Reviewed-by: Serge Semin <fancer.lancer at gmail.com>
-Sergey
>
> Link: https://lore.kernel.org/all/20220620205654.g7fyipwytbww5757@mobilestation/
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
> Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> index e25d44c218f2..0a43d6e0ef91 100644
> --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> @@ -143,12 +143,6 @@ patternProperties:
> minimum: 0
> maximum: 3
>
> - spi-rx-bus-width:
> - const: 1
> -
> - spi-tx-bus-width:
> - const: 1
> -
> unevaluatedProperties: false
>
> required:
> --
> 2.36.1
>
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