[PATCH v5 09/19] arch_topology: Use the last level cache information from the cacheinfo
Conor.Dooley at microchip.com
Conor.Dooley at microchip.com
Wed Jun 29 16:25:41 PDT 2022
On 29/06/2022 21:32, Conor.Dooley at microchip.com wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 29/06/2022 20:54, Sudeep Holla wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> On Wed, Jun 29, 2022 at 07:39:43PM +0000, Conor.Dooley at microchip.com wrote:
>>> On 29/06/2022 19:42, Sudeep Holla wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>>
>>>> On Wed, Jun 29, 2022 at 06:18:25PM +0000, Conor.Dooley at microchip.com wrote:
>>>>>
>>>>> No, no it doesn't. Not sure what I was thinking there.
>>>>> Prob tested that on the the last commit that bisect tested
>>>>> rather than the one it pointed out the problem was with.
>>>>>
>>>>> Either way, boot is broken in -next.
>>>>>
>>>>
>>>> Can you check if the below fixes the issue?
>>>
>>> Unfortunately, no joy.
>>> Applied to a HEAD of 3b23bb2573e6 ("arch_topology: Use the
>>> last level cache information from the cacheinfo").
>>
>> That's bad. Does the system boot with
>> Commit 2f7b757eb69d ("arch_topology: Add support to parse and detect cache
>> attributes") ?
>
> It does.
FWIW boot log of the failure:
[ 0.000000] Linux version 5.19.0-rc4-00009-g3b23bb2573e6-dirty (conor@) (riscv64-unknown-linux-gnu-gcc (g5964b5cd727) 11.1.0, GNU ld (GNU Binutils) 2.37) #1 SMP Thu Jun 30 00:22:42 IST 2022
[ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
[ 0.000000] Machine model: Microchip PolarFire-SoC Icicle Kit
[ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000020100000 (options '115200n8')
[ 0.000000] printk: bootconsole [ns16550a0] enabled
[ 0.000000] printk: debug: skip boot console de-registration.
[ 0.000000] efi: UEFI not found.
[ 0.000000] Zone ranges:
[ 0.000000] DMA32 [mem 0x0000000080200000-0x00000000ffffffff]
[ 0.000000] Normal [mem 0x0000000100000000-0x000000103fffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000080200000-0x00000000adffffff]
[ 0.000000] node 0: [mem 0x0000001000000000-0x000000103fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000103fffffff]
[ 0.000000] On node 0, zone Normal: 16064512 pages in unavailable ranges
[ 0.000000] SBI specification v0.3 detected
[ 0.000000] SBI implementation ID=0x1 Version=0x9
[ 0.000000] SBI TIME extension detected
[ 0.000000] SBI IPI extension detected
[ 0.000000] SBI RFENCE extension detected
[ 0.000000] SBI HSM extension detected
[ 0.000000] CPU with hartid=0 is not available
[ 0.000000] CPU with hartid=0 is not available
[ 0.000000] riscv: base ISA extensions acdfim
[ 0.000000] riscv: ELF capabilities acdfim
[ 0.000000] percpu: Embedded 18 pages/cpu s34104 r8192 d31432 u73728
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 224263
[ 0.000000] Kernel command line: earlycon keep_bootcon
[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] software IO TLB: mapped [mem 0x00000000aa000000-0x00000000ae000000] (64MB)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] fixmap : 0xffffffc6fee00000 - 0xffffffc6ff000000 (2048 kB)
[ 0.000000] pci io : 0xffffffc6ff000000 - 0xffffffc700000000 ( 16 MB)
[ 0.000000] vmemmap : 0xffffffc700000000 - 0xffffffc800000000 (4096 MB)
[ 0.000000] vmalloc : 0xffffffc800000000 - 0xffffffd800000000 ( 64 GB)
[ 0.000000] lowmem : 0xffffffd800000000 - 0xffffffe7bfe00000 ( 62 GB)
[ 0.000000] kernel : 0xffffffff80000000 - 0xffffffffffffffff (2047 MB)
[ 0.000000] Memory: 807748K/1800192K available (6523K kernel code, 4857K rwdata, 2048K rodata, 2171K init, 396K bss, 992444K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
[ 0.000000] rcu: RCU debug extended QS entry/exit.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] CPU with hartid=0 is not available
[ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu at 0/interrupt-controller
[ 0.000000] riscv-intc: 64 local interrupts mapped
[ 0.000000] plic: interrupt-controller at c000000: mapped 186 interrupts with 4 handlers for 9 contexts.
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [4]
[ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
[ 0.000003] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
[ 0.009639] Console: colour dummy device 80x25
[ 0.014583] printk: console [tty0] enabled
[ 0.019220] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000)
[ 0.030377] pid_max: default: 32768 minimum: 301
[ 0.035905] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.044169] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.057018] cblist_init_generic: Setting adjustable number of callback queues.
[ 0.065031] cblist_init_generic: Setting shift to 2 and lim to 1.
[ 0.072068] riscv: ELF compat mode failed
[ 0.072084] ASID allocator disabled (0 bits)
[ 0.081558] rcu: Hierarchical SRCU implementation.
[ 0.087482] EFI services will not be available.
[ 0.093816] smp: Bringing up secondary CPUs ...
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