[PATCH v4 1/5] drivers/perf: riscv_pmu_sbi: perf format

[Will Deacon]

On Fri, Jun 24, 2022 at 07:00:51PM +0300, Nikita Shubin wrote:
> From: Nikita Shubin <n.shubin at yadro.com>
> 
> Update driver to export formatting and event information to sysfs so it
> can be used by the perf user space tools with the syntaxes:
> 
> perf stat -e cpu/event=0x05
> perf stat -e cpu/event=0x05,firmware=0x1/
> 
> 63-bit is used to distinguish hardware events from firmware. Firmware
> events are defined by "RISC-V Supervisor Binary Interface
> Specification".
> 
> perf stat -e cpu/event=0x05,firmware=0x1/
> 
> is equivalent to
> 
> perf stat -e r8000000000000005
> 
> Inspired-by: João Mário Domingos <joao.mario at tecnico.ulisboa.pt>
> Signed-off-by: Nikita Shubin <n.shubin at yadro.com>
> Link: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc
> ---
>  drivers/perf/riscv_pmu_sbi.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index dca3537a8dcc..2b5861a10d8e 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -21,6 +21,25 @@
>  #include <asm/sbi.h>
>  #include <asm/hwcap.h>
>  
> +PMU_FORMAT_ATTR(event, "config:0-62");
> +PMU_FORMAT_ATTR(firmware, "config:63-63");

Usually single-bit fields omit the upper bound, so this would be simply
"config:63".

Will