[RESEND PATCH v4] MAINTAINERS: add polarfire rng, pci and clock drivers

Conor Dooley mail at conchuod.ie
Wed Jun 22 15:58:23 PDT 2022


From: Conor Dooley <conor.dooley at microchip.com>

Hardware random, PCI and clock drivers for the PolarFire SoC have been
upstreamed but are not covered by the MAINTAINERS entry, so add them.
Daire is the author of the clock & PCI drivers, so add him as a
maintainer in place of Lewis.

Acked-by: Bjorn Helgaas <bhelgaas at google.com>
Acked-by: Stephen Boyd <sboyd at kernel.org>
Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
---
 MAINTAINERS | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index a6d3bd9d2a8d..01a7bfa49bdc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17136,12 +17136,15 @@ N:	riscv
 K:	riscv
 
 RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
-M:	Lewis Hanly <lewis.hanly at microchip.com>
 M:	Conor Dooley <conor.dooley at microchip.com>
+M:	Daire McNamara <daire.mcnamara at microchip.com>
 L:	linux-riscv at lists.infradead.org
 S:	Supported
 F:	arch/riscv/boot/dts/microchip/
+F:	drivers/char/hw_random/mpfs-rng.c
+F:	drivers/clk/microchip/clk-mpfs.c
 F:	drivers/mailbox/mailbox-mpfs.c
+F:	drivers/pci/controller/pcie-microchip-host.c
 F:	drivers/soc/microchip/
 F:	include/soc/microchip/mpfs.h
 
-- 
2.36.1




More information about the linux-riscv mailing list