[PATCH] riscv: config: enable SOC_STARFIVE in defconfig

[Emil Renner Berthing]

On Fri, 17 Jun 2022 at 19:26, Conor Dooley <mail at conchuod.ie> wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> SOC_STARFIVE is the odd one out among the (compatible) SOC_FOO options
> as it is not enabled in the default defconfig. Add it to make catching
> dt regressions etc easier.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>

Thanks, this would be great.
Acked-by: Emil Renner Berthing <kernel at esmil.dk>

>
> git send-email gave me an error that was unclear as to whether anything
> got sent. Checked lore (and my inbox) but didn't see it come through so
> hopefully this isn't a resend.
>
>  arch/riscv/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 0cc17db8aaba..f8d7d9527c6e 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -18,6 +18,7 @@ CONFIG_EXPERT=y
>  CONFIG_PROFILING=y
>  CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SOC_SIFIVE=y
> +CONFIG_SOC_STARFIVE=y
>  CONFIG_SOC_VIRT=y
>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
> --
> 2.36.1
>